Cache memory is used in computer systems in order to increase performance by alleviating the need for a processor to fetch instructions from main system memory sources, such as dynamic random-access memory (DRAM). DRAM and other main memory sources may require longer access times due to paging and memory cell access speed, which can cause the processor to incur wait-states and degrade computer system performance.
Cache memory, on the other hand, allows the processor to fetch instructions quickly without incurring the wait-states associated with main memory sources, such as DRAM. Cache memory improves computer system performance by making commonly-used instructions available to the processor without requiring paging cycles, by using a relatively fast-access memory cell, and by being in close proximity to the processor's local bus in order to reduce physical delay associated with bus structures.
Similarly, instruction caches can also be used within high-performance microprocessors to decrease the average instruction fetch latency. In order to further decrease fetch latency, instructions may be cached in decoded or “micro-op ” (uop )format. Advantageously, caching instructions in uop format can decrease instruction decode logic within microprocessor, since only instructions fetched as a result of a cache miss need be decoded.
Typically, only one uop is able to be stored within each cache memory entry, as illustrated in FIG. 1 Furthermore, some instructions contain more than one uop, resulting in more than one cache entry being used to store a single instruction.